An amplifier arrangement, more particularly an operational amplifier having Miller compensation is described, by way of example, in the printed document from Gregorian Roubik “Introduction to CMOS OP-AMPS and Comparators”, John Wiley and Sons, 1999, Chapter 4.4. In such operational amplifiers, however, the problem may arise that unwanted parasitic pole points arise under different load and bias conditions.
If no pole point/zero point compensation is carried out for these pole points, the parasitic pole could be shifted to higher frequencies. However, this disadvantageously results in a higher power requirement. Otherwise, the stability of the amplifier is reduced.
If compensation for the additional parasitic pole is performed at the output, however, for example, using a series circuit comprising the Miller compensation capacitor and a resistor, then the quiescent current can be significantly reduced.
However, stability problems may arise under different load conditions. The stability problems arise particularly disadvantageously if the operational amplifier is in the form of a class AB operational amplifier.